{"id":3232,"date":"2025-12-12T13:53:04","date_gmt":"2025-12-12T11:53:04","guid":{"rendered":"https:\/\/kiip.ee\/?page_id=3232"},"modified":"2026-04-28T11:25:00","modified_gmt":"2026-04-28T08:25:00","slug":"pilot-lines","status":"publish","type":"page","link":"https:\/\/kiip.ee\/en\/pilot-lines\/","title":{"rendered":"Pilot Lines"},"content":{"rendered":"\n<div class=\"wp-block-group is-style-group-spacing has-global-padding is-content-justification-center is-layout-constrained wp-container-core-group-is-layout-60e04bea wp-block-group-is-layout-constrained\" style=\"padding-top:0;padding-right:0;padding-bottom:0;padding-left:0\">\n<div class=\"wp-block-columns alignwide is-layout-flex wp-container-core-columns-is-layout-28f84493 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\">\n<h2 class=\"wp-block-heading\">Pilot-to-Production: Chips JU Pilot Lines<\/h2>\n\n\n\n<p>KIIP also provides access to the first five open-access <a href=\"https:\/\/www.chips-ju.europa.eu\/pilot-lines-detail\/\" data-type=\"link\" data-id=\"https:\/\/www.chips-ju.europa.eu\/Pilot-lines\/\" target=\"_blank\" rel=\"noreferrer noopener\"><strong>pilot lines of Chips JU<\/strong><\/a>, enabling companies, research institutions, and start-ups to prototype and scale innovative semiconductor solutions. The Chips Joint Undertaking (Chips JU) has launched five open-access pilot lines across Europe to enable prototyping, R&amp;D, testing, and early manufacturing of next-generation semiconductor technologies. These facilities are part of the Chips for Europe Initiative under the EU Chips Act.<\/p>\n\n\n\n<figure class=\"wp-block-image aligncenter size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"799\" height=\"327\" src=\"https:\/\/kiip.ee\/wp-content\/uploads\/2025\/12\/chipsju_sm.png\" alt=\"\" class=\"wp-image-3183\" srcset=\"https:\/\/kiip.ee\/wp-content\/uploads\/2025\/12\/chipsju_sm.png 799w, https:\/\/kiip.ee\/wp-content\/uploads\/2025\/12\/chipsju_sm-300x123.png 300w, https:\/\/kiip.ee\/wp-content\/uploads\/2025\/12\/chipsju_sm-768x314.png 768w\" sizes=\"auto, (max-width: 799px) 100vw, 799px\" \/><\/figure>\n\n\n\n<h3 class=\"wp-block-heading\">Available Pilot Lines<\/h3>\n<\/div>\n<\/div>\n<\/div>\n\n\n\n<div class=\"wp-block-group is-style-group-spacing has-global-padding is-layout-constrained wp-container-core-group-is-layout-639b5052 wp-block-group-is-layout-constrained\" style=\"padding-top:0;padding-right:0;padding-bottom:0;padding-left:0\">\n<div class=\"wp-block-columns alignwide is-layout-flex wp-container-core-columns-is-layout-28f84493 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column has-custom-grey-bg-background-color has-background is-layout-flow wp-block-column-is-layout-flow\">\n<h3 class=\"wp-block-heading has-custom-4-font-size\"><strong><strong>NanoIC: Beyond-2 nm Leading-Edge System-on-Chip<\/strong><\/strong><\/h3>\n\n\n\n<p><strong>What it is:<\/strong> A pilot line enabling state-of-the-art CMOS technologies beyond the 2 nm node for advanced SoC development, targeting logic, memory, and interconnect innovation.<br><strong>Learn more \/ access:<\/strong><\/p>\n\n\n\n<figure class=\"wp-block-image aligncenter size-large is-resized\"><a href=\"https:\/\/www.nanoic-project.eu\/en\" target=\"_blank\" rel=\" noreferrer noopener\"><img loading=\"lazy\" decoding=\"async\" width=\"1042\" height=\"267\" src=\"https:\/\/kiip.ee\/wp-content\/uploads\/2026\/03\/NanoIC_logo_RGB_horizontal.svg\" alt=\"\" class=\"wp-image-3387\" style=\"width:300px\"\/><\/a><\/figure>\n<\/div>\n<\/div>\n<\/div>\n\n\n\n<div class=\"wp-block-group is-style-group-spacing has-global-padding is-layout-constrained wp-container-core-group-is-layout-639b5052 wp-block-group-is-layout-constrained\" style=\"padding-top:0;padding-right:0;padding-bottom:0;padding-left:0\">\n<div class=\"wp-block-columns alignwide is-layout-flex wp-container-core-columns-is-layout-28f84493 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column has-custom-grey-bg-background-color has-background is-layout-flow wp-block-column-is-layout-flow\">\n<h3 class=\"wp-block-heading has-custom-4-font-size\"><strong><strong><strong>FAMES: Fully Depleted SOI Applications<\/strong><\/strong><\/strong><\/h3>\n\n\n\n<p><strong>What it is:<\/strong> Pilot line focused on FD-SOI technology with a roadmap to low-power, high-performance semiconductor solutions including embedded memories, RF, and 3D integration. <br><strong>Learn more \/ access:<\/strong><\/p>\n\n\n\n<figure class=\"wp-block-image aligncenter size-full is-resized\"><a href=\"https:\/\/fames-pilot-line.eu\/\" target=\"_blank\" rel=\" noreferrer noopener\"><img loading=\"lazy\" decoding=\"async\" width=\"768\" height=\"346\" src=\"https:\/\/kiip.ee\/wp-content\/uploads\/2026\/03\/logo-FAMES-768x346-1.jpg\" alt=\"\" class=\"wp-image-3389\" style=\"width:280px\" srcset=\"https:\/\/kiip.ee\/wp-content\/uploads\/2026\/03\/logo-FAMES-768x346-1.jpg 768w, https:\/\/kiip.ee\/wp-content\/uploads\/2026\/03\/logo-FAMES-768x346-1-300x135.jpg 300w\" sizes=\"auto, (max-width: 768px) 100vw, 768px\" \/><\/a><\/figure>\n<\/div>\n<\/div>\n<\/div>\n\n\n\n<div class=\"wp-block-group is-style-group-spacing has-global-padding is-layout-constrained wp-container-core-group-is-layout-639b5052 wp-block-group-is-layout-constrained\" style=\"padding-top:0;padding-right:0;padding-bottom:0;padding-left:0\">\n<div class=\"wp-block-columns alignwide is-layout-flex wp-container-core-columns-is-layout-28f84493 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column has-custom-grey-bg-background-color has-background is-layout-flow wp-block-column-is-layout-flow\">\n<h3 class=\"wp-block-heading has-custom-4-font-size\"><strong><strong><strong><strong>APECS: Advanced Packaging &amp; Heterogeneous Integration<\/strong><\/strong><\/strong><\/strong><\/h3>\n\n\n\n<p><strong>What it is:<\/strong> Pilot line for advanced packaging, chiplet integration and heterogeneous system technologies, coordinated by a Fraunhofer-led consortium.<br><strong>Learn more \/ access:<\/strong><\/p>\n\n\n\n<figure class=\"wp-block-image aligncenter size-full is-resized\"><a href=\"https:\/\/www.apecs.eu\/\" target=\"_blank\" rel=\" noreferrer noopener\"><img loading=\"lazy\" decoding=\"async\" width=\"2560\" height=\"715\" src=\"https:\/\/kiip.ee\/wp-content\/uploads\/2026\/03\/fmd_apecs_logo-scaled.png\" alt=\"\" class=\"wp-image-3391\" style=\"width:300px\" srcset=\"https:\/\/kiip.ee\/wp-content\/uploads\/2026\/03\/fmd_apecs_logo-scaled.png 2560w, https:\/\/kiip.ee\/wp-content\/uploads\/2026\/03\/fmd_apecs_logo-300x84.png 300w, https:\/\/kiip.ee\/wp-content\/uploads\/2026\/03\/fmd_apecs_logo-1024x286.png 1024w, https:\/\/kiip.ee\/wp-content\/uploads\/2026\/03\/fmd_apecs_logo-768x215.png 768w, https:\/\/kiip.ee\/wp-content\/uploads\/2026\/03\/fmd_apecs_logo-1536x429.png 1536w, https:\/\/kiip.ee\/wp-content\/uploads\/2026\/03\/fmd_apecs_logo-2048x572.png 2048w\" sizes=\"auto, (max-width: 2560px) 100vw, 2560px\" \/><\/a><\/figure>\n<\/div>\n<\/div>\n<\/div>\n\n\n\n<div class=\"wp-block-group is-style-group-spacing has-global-padding is-layout-constrained wp-container-core-group-is-layout-639b5052 wp-block-group-is-layout-constrained\" style=\"padding-top:0;padding-right:0;padding-bottom:0;padding-left:0\">\n<div class=\"wp-block-columns alignwide is-layout-flex wp-container-core-columns-is-layout-28f84493 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column has-custom-grey-bg-background-color has-background is-layout-flow wp-block-column-is-layout-flow\">\n<h3 class=\"wp-block-heading has-custom-4-font-size\"><strong><strong><strong><strong><strong>WBG: Wide Bandgap Materials (SiC &amp; GaN)<\/strong><\/strong><\/strong><\/strong><\/strong><\/h3>\n\n\n\n<p><strong>What it is:<\/strong> Pilot line developing wide bandgap semiconductor devices (such as SiC and GaN) for high-performance power and RF electronics applications.<br><strong>Learn more \/ access:<\/strong><\/p>\n\n\n\n<figure class=\"wp-block-image aligncenter size-full is-resized\"><a href=\"https:\/\/www.wbg-pilot-line.eu\/\" target=\"_blank\" rel=\" noreferrer noopener\"><img loading=\"lazy\" decoding=\"async\" width=\"600\" height=\"194\" src=\"https:\/\/kiip.ee\/wp-content\/uploads\/2026\/03\/Logo-WBG-WEB_PNG.png\" alt=\"\" class=\"wp-image-3393\" style=\"width:300px\" srcset=\"https:\/\/kiip.ee\/wp-content\/uploads\/2026\/03\/Logo-WBG-WEB_PNG.png 600w, https:\/\/kiip.ee\/wp-content\/uploads\/2026\/03\/Logo-WBG-WEB_PNG-300x97.png 300w\" sizes=\"auto, (max-width: 600px) 100vw, 600px\" \/><\/a><\/figure>\n<\/div>\n<\/div>\n<\/div>\n\n\n\n<div class=\"wp-block-group is-style-group-spacing has-global-padding is-layout-constrained wp-container-core-group-is-layout-639b5052 wp-block-group-is-layout-constrained\" style=\"padding-top:0;padding-right:0;padding-bottom:0;padding-left:0\">\n<div class=\"wp-block-columns alignwide is-layout-flex wp-container-core-columns-is-layout-28f84493 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column has-custom-grey-bg-background-color has-background is-layout-flow wp-block-column-is-layout-flow\">\n<h3 class=\"wp-block-heading has-custom-4-font-size\"><strong><strong><strong><strong><strong><strong>PIXEurope: Photonic Integrated Circuits<\/strong><\/strong><\/strong><\/strong><\/strong><\/strong><\/h3>\n\n\n\n<p><strong>What it is:<\/strong> A pilot line initiative to build an open-access photonic integrated circuits (PIC) ecosystem, covering design, fabrication, integration, testing and reliability technologies.<br><strong>Learn more \/ access:<\/strong><\/p>\n\n\n\n<figure class=\"wp-block-image aligncenter size-full is-resized\"><a href=\"https:\/\/pixeurope.eu\/\" target=\"_blank\" rel=\" noreferrer noopener\"><img loading=\"lazy\" decoding=\"async\" width=\"300\" height=\"57\" src=\"https:\/\/kiip.ee\/wp-content\/uploads\/2026\/03\/Reduced-Negative-yellow-web-300x57-1.png\" alt=\"\" class=\"wp-image-3395\" style=\"width:300px\"\/><\/a><\/figure>\n<\/div>\n<\/div>\n<\/div>\n\n\n\n<div class=\"wp-block-group is-style-group-spacing has-global-padding is-content-justification-center is-layout-constrained wp-container-core-group-is-layout-60e04bea wp-block-group-is-layout-constrained\" style=\"padding-top:0;padding-right:0;padding-bottom:0;padding-left:0\">\n<div class=\"wp-block-columns alignwide is-layout-flex wp-container-core-columns-is-layout-28f84493 wp-block-columns-is-layout-flex\">\n<div class=\"wp-block-column is-layout-flow wp-block-column-is-layout-flow\">\n<p>These pilot lines, available via Chips JU and supported by KIIP, help bridge the gap between research-level design and industrial-scale manufacturing. They offer the infrastructure and expertise to validate and scale novel semiconductor technologies under open, non-discriminatory access.<\/p>\n<\/div>\n<\/div>\n<\/div>\n","protected":false},"excerpt":{"rendered":"<p>Pilot-to-Production: Chips JU Pilot Lines KIIP also provides access to the first five open-access pilot lines of Chips JU, enabling companies, research institutions, and start-ups to prototype and scale innovative semiconductor solutions. The Chips Joint Undertaking (Chips JU) has launched five open-access pilot lines across Europe to enable prototyping, R&amp;D, testing, and early manufacturing of [&hellip;]<\/p>\n","protected":false},"author":12,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"_acf_changed":false,"footnotes":""},"class_list":["post-3232","page","type-page","status-publish","hentry"],"acf":[],"_links":{"self":[{"href":"https:\/\/kiip.ee\/en\/wp-json\/wp\/v2\/pages\/3232","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/kiip.ee\/en\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/kiip.ee\/en\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/kiip.ee\/en\/wp-json\/wp\/v2\/users\/12"}],"replies":[{"embeddable":true,"href":"https:\/\/kiip.ee\/en\/wp-json\/wp\/v2\/comments?post=3232"}],"version-history":[{"count":13,"href":"https:\/\/kiip.ee\/en\/wp-json\/wp\/v2\/pages\/3232\/revisions"}],"predecessor-version":[{"id":3496,"href":"https:\/\/kiip.ee\/en\/wp-json\/wp\/v2\/pages\/3232\/revisions\/3496"}],"wp:attachment":[{"href":"https:\/\/kiip.ee\/en\/wp-json\/wp\/v2\/media?parent=3232"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}